Power delivery needs adequate current paths and low-inductance connections even when component escape is dense. Fine signal routing rules are not power-distribution rules.
What to consider
Review plane connectivity, narrow copper necks and the placement of decoupling connections. A dense field of antipads can reduce current-carrying area. Assign power/ground microvias from the actual current and inductance requirements and validate the complete PDN rather than assuming more vias always resolve the problem.
A practical review example
Inspect the path from a regulator to the device power pins, including plane neck-downs and layer transitions. Check both DC voltage drop and the required transient behavior.
Checks before release
- Avoid unreviewed current bottlenecks.
- Place decoupling with loop inductance in view.
- Evaluate thermal and electrical loading of via groups.
Connect this decision to fabrication
Use the signal routing to organize the initial discussion. Keep proposed values separate from the approved drawing and document the effect of any change on the rest of the construction.
- Use edge rate and channel loss, not clock frequency alone.
- Keep a continuous return path at traces, vias and connectors.
- Verify final geometry against the device and interface requirements.
Technical references
HDI design and manufacturing overviewReferences checked 2 October 2026. Manufacturer data describes its stated construction and is not an HDIPCB.org manufacturing commitment.