Controlled impedance in an HDI stackup

What to consider

A target such as 50 Ω or 100 Ω is a requirement, not a trace-width recipe. Solder mask, finished copper and conductor shape can affect the result. The fabricator’s impedance calculation and coupon plan should match the production construction. Agree how permissible adjustments are reviewed before tooling.

A practical review example

If the factory changes dielectric thickness to use a stocked construction, recalculate width and pair gap. Confirm the new geometry still fits the BGA escape and routing corridors.

Checks before release

1. State impedance targets, tolerance and applicable layer.
2. Use final copper and pressed dielectric values.
3. Agree coupon geometry and measurement reporting.

Connect this decision to fabrication

Use the signal routing to organize the initial discussion. Keep proposed values separate from the approved drawing and document the effect of any change on the rest of the construction.

• Use edge rate and channel loss, not clock frequency alone.
• Keep a continuous return path at traces, vias and connectors.
• Verify final geometry against the device and interface requirements.