Budget both plane layers and via corridors. Evaluate 2+12+2 or 3+10+3 as candidate notation, then verify the actual escape and plane allocation.
What to consider
With sixteen layers, power islands and through-via antipads can consume a meaningful share of routing area. Count channels through the complete stack rather than budgeting all signal layers at full capacity.
Conceptual layer allocation
Compare 2+12+2 or 3+10+3. This illustration assigns copper functions only; it does not define dielectric thickness, impedance or an approved via structure.
| Build-up per side | Core copper layers | Total copper layers |
|---|---|---|
| 1 | 14 | 16 |
| 2 | 12 | 16 |
| 3 | 10 | 16 |
A practical review example
Compare two routes from a dense controller to a connector: a short top-side build-up route and an inner-core route with transitions. Simulate the channel including those transitions.
Checks before release
- Allocate signal, ground and power copper before counting routing capacity.
- Agree pressed dielectric values and finished thickness.
- Define every laser and mechanical via span.
Connect this decision to fabrication
Use the stackup planner to organize the initial discussion. Keep proposed values separate from the approved drawing and document the effect of any change on the rest of the construction.
- Give every signal layer a defined return-path strategy.
- Review material and copper balance about the board center.
- Specify every via span and the factory-approved lamination sequence.
Technical references
HDI construction types and definitionsFabrication design guidelinesReferences checked 2 October 2026. Manufacturer data describes its stated construction and is not an HDIPCB.org manufacturing commitment.